GPUWorks launches inference platform supporting Ascend, PPU, Hygon, and NVIDIA in one cluster
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GPUWorks launches inference platform supporting Ascend, PPU, Hygon, and NVIDIA in one cluster

GPUWorks, a lightweight enterprise platform for artificial intelligence inference, was released as open-source under the Apache-2.0 license on November 4. This information was published by IT Home. The code is available on GitHub in the FlitAI organization, allowing enterprises and developers to use, modify, or contribute to inference and chip adaptation templates.

This platform unifies accelerators from various manufacturers and sources into a single managed pool. It maps models to hardware, assesses GPU memory requirements, and deploys models from templates, subsequently providing access via an OpenAI-compatible API. Supported chips include NVIDIA and AMD, as well as Huawei Ascend, T-Head PPU, and Hygon DCU.

Bare-metal servers, virtual machines, and cloud containers can operate within the same cluster, regardless of whether they are located in the company's own data centers, private, or public clouds.

Platform Features and Performance

Developers particularly highlight the solution's compactness: the installer weighs just over 40 MB, installs with a single command in about 60 seconds, and does not require Kubernetes. Users on the internal network can download the installer, model files, and runtime images offline. The catalog includes over a thousand launch configurations for nearly 400 models, with an image, inference engine, weight version, and launch flags packaged for each model-chip combination.

A built-in AI assistant helps diagnose failures, and the scheduler explains every placement decision made. According to the team's own tests, one GPUWorks server was able to manage 1003 GPU servers and spin up over 500 inference replicas in four minutes. The output reached 69,000 tokens per second while using only nine CPU cores and 1.6 GB of memory. The wake-up time for the deployed DeepSeek-V4.1-Flash was only 3.6 seconds.

The wake-up feature allows several large models to alternately use the same GPUs. Level one sleep mode keeps the model weights in host memory, eliminating the need to restart the engine or reload weights from storage. During testing on eight NVIDIA H20 cards, where three large models were distributed across all eight cards, a cold start from NFS storage took between 16 and 17.5 minutes, whereas service recovery after waking from memory took about four seconds, representing an improvement of approximately 200 times. Administrators can configure priority policies, idle eviction, or scheduled rotation.

For more demanding workloads, the platform supports multi-node parallelism, multiple replicas, and separation of preprocessing and decoding, allowing configuration of RDMA networking or Ascend HCCS channels. Built-in load tests are also provided to check throughput and latency before scaling. The system tracks token usage and cache hits per API key, model, and deployment, as well as card hours per million output tokens and unused GPUs. During node maintenance, the platform adds replicas before decommissioning old ones and automatically restores services on another suitable node if a machine fails.

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Wuxi Cluster from Moore Threads with 2112 GPUs Reaches 92.9% Utilization After Commercial Operation Begins
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Wuxi Cluster from Moore Threads with 2112 GPUs Reaches 92.9% Utilization After Commercial Operation Begins

Commercial operation of the domestic computing cluster, built on Moore Threads' MTT S5000 GPUs, has commenced in Wuxi, Jiangsu. According to a report by Zhidx dated November 2, this center began its first phase in June, entered trial mode in July, and started commercial service in October.

The current phase of the cluster includes 264 servers equipped with 2112 S5000 cards. Data provided by Zhidx shows that the cluster utilization has reached 92.9%. During the trial period, 55 clients were engaged and 33 models were implemented. Over 62% of workloads are dedicated to model training, while mixed training and inference account for 14.7%, and pure inference accounts for 23.1%.

The cluster is structured into four modules, each containing approximately 500 cards, and was delivered as a complete unit. It reached full load within three months of launch. The system supports over 30 model families, including Qwen, GLM, DeepSeek, Kimi, and MiniMax.

In inference testing using the S5000 pool and the DeepSeek V4 Flash model with 7 thousand input and 2 thousand output tokens, a single machine throughput of 994.97 tokens per second and an effective inference rate of 1241 tokens per second were recorded. The system handled 48 concurrent requests within the target service level, which the report sets at 92% of the H800 configuration during a similar test. It should be noted that these figures were presented by the cluster operators and have not undergone independent verification.

The cluster also offers a mixed deployment option that combines S5000 cards with other accelerators through pre-loading and decoding disaggregation. In one of the configurations mentioned in the report, three S5000 cards combined with two H20 cards achieved a throughput comparable to nine H20 cards, which is approximately 1.87 times higher than the baseline, while simultaneously reducing time-to-first-token by about half.

Automotive manufacturer Neolix plans to conduct training for its autonomous driving models on this site, with demand approaching the level of 10,000 cards, which is roughly five times the current number of cards in the cluster. Previously, Moore Threads stated that its 10,000-card S5000-based cluster provides 10 EFLOPS of computing power with 90% effective training time and 95% linear scaling efficiency. Expansion in Wuxi will occur in phases, and the report mentions that Moore Threads is also collaborating with JD Cloud on creating a 100,000-card cluster.

The facility in Wuxi is part of a growing number of regional computing centers in China built on domestic accelerators, as operators transition from demonstration setups to large-scale clusters serving model developers and robotics companies.

Moore Threads releases Megatron-MUSA-Titan for training trillion-parameter MoE models on proprietary GPUs
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Moore Threads releases Megatron-MUSA-Titan for training trillion-parameter MoE models on proprietary GPUs

Moore Threads has made the Megatron-MUSA-Titan project publicly available, presenting an infrastructure for training large models that it developed for use on its own graphics processors. This project is designed to work with trillion-parameter 'mixture-of-experts' (MoE) models on clusters consisting of over 10,000 Moore Threads GPUs, covering both pre-training and reinforcement learning.

The project code is available on GitHub. The company claims that this system was continuously used for pre-training a trillion-parameter MoE on 10,000-GPU clusters, where long training sessions ensured high FLOPs utilization and process stability.

The repository includes an example configuration for a Kimi-K2 style MoE model with 1 trillion parameters. A central design principle was maintaining closeness to existing solutions. Megatron-MUSA-Titan is built upon NVIDIA's Megatron-LM framework. Through integration of PyTorch via torch_musa and compatibility of MUSA C with CUDA C, developers with the MUSA environment can clone official Megatron-LM, slime, and miles repositories and run training on Moore Threads GPUs without modifying the source code.

The project indicates that general algorithms and bug fixes should be directed to upstream projects, while Moore Threads focuses on two types of changes: large-scale optimizations adapted for Moore Threads hardware and clusters, and workarounds for specific MUSA issues.

Pre-training features include block training in FP8 format, which relies on Moore Threads' MT-TransformerEngine. MoE token dispatching and merging are accelerated by DeepEP, running on the company's Async Copy Engine, which also allows expert communication parallel to computations. Other options include activation offloading using virtual pipeline parallelism and scheduling one forward and one backward pass, as well as pipeline parallel communication combined with computation, thanks to Mooncake RDMA.

A distributed tracing analysis tool reads PyTorch traces from each GPU to detect bottlenecks such as pipeline bubbles and low-performance nodes. The project states that it can analyze a 1-trillion-parameter MoE run on 10,000 GPUs in just a few hours.

For reinforcement learning, the stack supports the slime and miles frameworks; Megatron handles the training, and the MUSA build of SGLang generates runs, allowing one base system to serve both pre-training and RL. Optimization for autonomous inference is not within the scope of this project.

For developers considering domestic accelerators, the practical question is what part of the existing training code will remain functional. Moore Threads' answer is that the Megatron ecosystem code requires no changes.

Iluvatar CoreX demonstrated Tiangai 300 GPU performance, claiming 1.05x superiority over H200
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Iluvatar CoreX demonstrated Tiangai 300 GPU performance, claiming 1.05x superiority over H200

Iluvatar CoreX unveiled the general-purpose Tiangai 300 GPU in a working state on real hardware during its media day on October 28th in Shanghai. Previously, the company's public materials regarding the chip focused solely on architecture and roadmap, not on functioning systems.

The main claim concerns performance comparison. Iluvatar CoreX asserts that Tiangai 300 is the first domestic general-purpose GPU whose measured performance reaches the level of NVIDIA H200. Furthermore, third-party testing, after data conversion, showed that the total throughput of one card is 1.05 times greater than that of H200. It is important to note that the company did not disclose the testing methodology, models used, or workload conditions, so this result cannot yet be independently verified.

This chip is intended for integration into the IXL144 supernode, which the company previously presented at the China International Industry Fair. One such IXL144 rack combines 144 GPUs, 18 CPUs, and approximately 10.1 TB of GPU memory, which Iluvatar CoreX calls the densest GPU supernode in the industry. According to its own estimates, this configuration reduces the cost per million effective tokens by 40% compared to mainstream international solutions.

Information on heterogeneous deployment was also presented at the open day. Iluvatar CoreX reported implementing the first domestic AFD disaggregation scheme between GPU and XPU, which reduced inference latency by 60%. AFD disaggregation typically involves splitting model computation stages, such as attention and forward propagation layers, across different processor types so that each performs the task it is most efficient at.

Regarding peripherals, the company stated that its Tongyang TY1200 chip outperforms NVIDIA Thor T5000 in conducted tests, again without publishing details. The TY1200, previously announced with 300 TOPS of dense computing for AI and embodied intelligence PCs, is also named the first domestic peripheral product capable of performing physics simulation with GPU acceleration based on MuJoCo-Warp—a function critical for training robots in simulation.

Overall, these demonstrations move Iluvatar CoreX's next-generation product line from paper specifications to working systems. The next point to watch will be independent benchmarks with disclosed workloads.

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