UltraRISC Technology, a Shanghai-based company, demonstrated the UR-CP400 processor core IP. This core conforms to the RVA23 profile, features 8-way out-of-order execution, and was presented at the sixth RISC-V Summit in China, held in Shenzhen from October 18 to 20.
The company plans to deliver this development to clients in the first quarter of 2027. It is important to note that UR-CP400 is an IP core, not a finished chip; UltraRISC licenses its cores to chip developers who then integrate them into their own processors, and also uses them in its proprietary CPU products.
According to UltraRISC statements, the core adheres to the RVA23 profile—a RISC-V application standardizing the feature set expected by major operating systems and software. It also supports version 1.0 of the RISC-V vector extension. The core's microarchitecture is implemented out-of-order with 8-way issue and a 14-stage pipeline.
On a prototype built on FPGA, the company achieved a SPECint2006 score above 22 instructions per gigahertz. This figure was obtained in an FPGA emulation configuration, not on finished silicon. At the summit, UltraRISC showcased an FPGA-based system demonstrating this prototype. While FPGA results are a useful early indicator of performance per clock cycle, they do not provide a direct representation of the final product's clock speeds, power consumption, or memory performance.
For comparison, the earlier UR-CP100 core, used in the eight-core UR-DP1000 desktop CPU, was rated by the company at 10.4 instructions per gigahertz according to the single-core SPECint2006 test. If the new metric holds true in silicon, UR-CP400 more than doubles the integer performance per clock compared to the previous generation.
Furthermore, UltraRISC claims that UR-CP400 includes virtualization enhancements for multi-level cloud environments, is designed to support server CPU platforms, and contains hardware optimizations aimed at agent AI workloads. The company did not provide detailed information regarding the specifics of these AI-related changes.
CTO Jian Jian presented the UR series and the latest advancements of the UR-CP400 architecture at the Data Center and High-Performance Computing Forum during the summit. Alongside the new core, UltraRISC demonstrated system solutions built on UR-DP1000, including edge AI installations, multi-node clusters, and virtualization.
The launch of UR-CP400 coincided with a busy week for high-end RISC-V development in China, as several companies used the summit to showcase server and automotive cores. It should be emphasized that all stated performance metrics are company claims and have not undergone independent testing.