Tsingway, in collaboration with the Beijing Academy of Artificial Intelligence (BAAI), has open-sourced the Open3D-PIMC project. This project constitutes a software model and framework specifically developed for three-dimensional compute chips. The project was presented at the China Computing Power Conference and is positioned as part of FlagOS's trajectory toward creating next-generation accelerators.
FlagOS, led by BAAI with participation from university partners and chip manufacturers, is oriented towards workflows such as 'write once, run on many chips.' These workflows cover various device types, including GPU, NPU, GPGPU, DSA, RISC-V AI, and Arm-class devices. Organizers emphasized that the release of this software is a necessary infrastructure element for the emerging hardware class, rather than just another set of operators.
The technical foundation of the project lies in placing memory closer to computational blocks, which reduces data movement and helps overcome the bandwidth and power consumption limitations faced by planar chips as model scales increase. Specifically, Tsingway's second-generation reconfigurable silicon is used to implement 3D in-memory computing and chiplet integration, transforming the unidirectional traffic of a planar chip into multi-lane computation with multi-level storage.
However, hardware alone is insufficient; without a common software surface, each manufacturer risks creating a separate software channel where the same application must be rewritten for every instruction set. Open3D-PIMC requires developers to specify data layout and task partitioning, after which the system automatically performs mapping and optimization. Furthermore, specific microarchitecture functions and instructions belonging to a particular vendor remain hidden behind plugins, allowing open collaboration and proprietary cores to coexist.
Men Chunlei, Head of AI Systems at BAAI, noted that this release fills a gap in the development of open compilers for 3D chips and could serve as a design benchmark until production silicon samples become available. FlagOS materials assert that adaptation is possible for over 20 chip manufacturers and more than 30 AI devices, and it supports running multiple chips simultaneously for large models. Examples of such models include Alibaba's Qwen3.8-2.4T-A95B MoE, which was tested on nine accelerators, including Huawei Ascend, MetaX, and Tsingway, during a zero-day verification in August 2026. Li Bing, Tsingway's Vice President of Software, stated that the company is engaged in developing architecture, integration, system aggregation, and open ecosystems, having achieved over 5000P deployments of reconfigurable computing nationwide.
This project is directly linked to policy directives from China's Ministry of Industry, which previously called for strengthening the supply of open-source code in foundational and AI software in 2026. Developers plan to continue standardizing models, creating cross-vendor backends and developer tools, with results from further 3D chip optimization expected at a major global technology event in the fourth quarter. Observers will watch whether the plugin backends can keep pace with silicon releases and if development teams will adopt a unified model instead of maintaining proprietary stacks. Until widespread third-party ports and workload data are available, Open3D-PIMC primarily documents an open entry point for a new class of hardware, rather than a complete multi-vendor runtime.