An industry report from September, prepared by Moyuan Think Tank and distributed by Semiconductor Industry Watch, analyzes how five registered Chinese AI accelerator suppliers are building their own factories for scaling. These factories represent connections between chips that allow multiple cards to function as a single machine within a server or rack.
The analysis is technical in nature and focuses on published throughput, product matching, and levels of implementation evidence for the ecosystem, excluding narratives about fundraising or stock prices.
Scaling differs from Ethernet or InfiniBand fabrics, which combine nodes into larger clusters. This review only considers accelerator-to-accelerator buses developed by the chip vendor itself. These are then evaluated based on public data: ranging from a complete lack of information to research papers, published specifications, samples, customer confirmation, first shipment, redeployment, and redeployment with a verifiable unit of connection area.
The maximum number of cards listed in datasheets is not considered proof that customers are already using such an area size in production.
Cambricon's MLU-Link is the most obvious example of first shipment among the materials reviewed. The product pages for MLU370-X8 list a cumulative bidirectional throughput of 200 Gbps per card with four ports. Earlier MLU290 class modules demonstrate an MLU-Link cumulative throughput of up to 600 Gbps on six ports, supporting multi-chip boards and inter-system connections beyond simple PCIe.
Enflame presents a patented path for scaling GCU-LARE through generations of CloudBlazer. Public data shows around 200 Gbps bidirectional on DTU 1.0 class cards and approximately 300 Gbps on DTU 2.0 / T20–T21 class modules, providing a clearer trajectory from chip to generation, even if the latter customer area sizes are harder to verify through open documentation.
Biren reveals its BLink scaling protocol. BR166 class materials indicate a connection bidirectional throughput of about 576 Gbps, while newer BLink 2.0 announcements hint at memory semantic links and optical super-node roadmaps targeting up to 1024 GPUs.
Moore Threads uses the MTLink brand, citing figures up to 240 Gbps on MTT S4000 bridge topologies covering two-, four-, and eight-card connections, as well as 784 Gbps from card to card on MTT S5000 devices. KUAE cluster materials emphasize the linearity of multi-card training.
MetaX described its own scaling relative to competitor products in official documents and demonstrated Xijing S600 rack-level designs connecting around 64 GPUs, although the report still requires a closer link between shipped SKUs and the exact fabric provided by customers.
Despite the throughput figures becoming discussed among the five companies, parameters such as bidirectional versus unidirectional units, counting per card versus counting per chip, and verified deployments within a single area remain uneven. None of the vendors reviewed in the report have reached the highest level of redeployment with a independently verifiable area size—this is a gap in evidence that operators should monitor as thousands of card clusters multiply.
