In the first half of the AI infrastructure era, there was a prevailing belief that more powerful chips were winning. However, this assumption officially became outdated at the World Artificial Intelligence Conference in Shanghai in 2026. The main trend is no longer about teraflops on a single board, but rather supernodes—rack-scale systems that combine hundreds or thousands of accelerators into a unified memory.
The competition is now focused on the overall system efficiency rather than the peak performance of individual chips. Biren Tech has positioned itself in the optical interconnect camp. Its NPO optical supernode for 1024 cards utilizes the internal BLink 2.0 protocol and near-packet optics to implement the 'copper exit, optical entry' principle in the scaling domain. Up to 1024 GPUs can share a single addressable memory space. The company's product line ranges from an electrical base configuration of 16 cards to a high-density rack of 128 cards and an optical supernode of 1024 cards.
Yixin Intelligent took a different approach. At its announcement at WAIC, it presented the industry's first RISC-V AI supernode based on its proprietary Epoch cloud AI chip, which is the first mass-produced high-performance AI accelerator based on RISC-V in China. The Epoch chip already supports FP8 precision with block quantization and plans to transition to EXFP4 and MXFP4 in the next generation. The supernode uses an orthogonal backplane-less connection, reducing hardware connection costs by 80 percent and narrowing latency to the hundreds of nanoseconds range.
The rest of the exhibition hall showcased competing concepts. Infinigence CoreX demonstrated dense general-purpose silicon for training. Kunlun Chip, a division spun off from Baidu, presented its third-generation architecture. SingularMOL showed a chiplet-based interconnection. Infinigence, the cloud side orchestrator from Infinigence Cloud, presented the software aspect: a dispatching layer capable of integrating disparate domestic hardware into a single virtual supercluster.
The economic underpinning of this situation is causing discomfort. GPUs in a poorly designed cluster spend most of their time waiting for data. Bandwidth, not computational power, has become the bottleneck for training and inference. Communication barriers mean that placing a thousand cards in a rack without a system interconnection strategy yields a 'token conversion rate' that may only be a tenth of the theoretical value. Chinese supernode suppliers are competing for token utilization per dollar of capital expenditure.
Equipment selection is no longer a decision made by a single vendor. A savvy Chinese AI lab in 2026 will acquire at least two different accelerators and wrap them in a software layer that distributes tasks across various vendors. Labs creating this orchestration layer will own the next bottleneck. WAIC 2026 will be remembered as the year when Chinese AI infrastructure suppliers stopped selling chips and started selling systems.