Intel and Lens Technology have signed an agreement on a strategic partnership aimed at accelerating the development of solutions for glass substrates. This step was taken on July 25th, three years after Intel first identified the glass substrate as a promising path for advanced packaging.
As part of this collaboration, companies Triassic (Guangdong) Technology and Tongge Micro independently overcame the fundamental problem of brittleness by employing material selection methods, process optimization, structural reinforcement, and control over the entire production cycle.
Yui Zongguang, a leading scientist at the Research Institute No. 58 of China Electronics Corporation and the rotating chairman of the Packaging and Testing Branch of the China Semiconductor Industry Association, informed China Electronics News that cracks caused by brittleness are no longer the main obstacle. He confirmed that products on glass substrates for mass production and samples for customers have successfully passed rigorous reliability tests, including thermal cycling, mechanical shock, and bending compliance.
Thus, the key competitive hurdle in the industry has shifted from solving basic brittleness issues to tackling more complex challenges related to high-precision Through Glass Via (TGV) performance, multilayer interconnects, and cost control during scaling.
Glass substrates can be applied in three chip packaging scenarios. Firstly, they serve as temporary glass carriers for already mature or near-mass-production 2D or 2.5D packages. Secondly, they can replace silicon interposers to reduce costs. Thirdly, they act as a glass substrate, replacing printed circuit boards (PCBs) or other organic substrates. In terms of TSMC's CoWoS, the second and third applications correspond to replacing the W (Wafer) layer or S (Substrate), respectively.
It is important to note that the glass substrate is intended not for the green printed circuit board in computers, but for the critical packaging layer between the chip and the printed circuit board, which determines packaging efficiency and signal integrity.
The performance of the TGV (Through Glass Via) process directly affects the overall performance of the entire board, making it the primary bottleneck. TGV accounts for over 40 percent of the processing cost of the glass substrate, with the most expensive segments being the vias themselves and metallization. The technology requires breakthroughs in three areas: forming high-precision holes using laser deep etching as the optimal path for high-density, large-size TGVs; ensuring high reliability of via metallization for uniform, dense metal deposition; and multilayer RDL interconnects and soldering, where issues such as composite substrate warping and even rupture due to the low mechanical strength of glass and thermal mismatch with multilayer wiring dielectrics dominate.
The glass substrate ecosystem in China includes substrate suppliers like Triassic and Tongge Micro, equipment manufacturers capable of local customization, and end integrators, including the Lens-Intel alliance. China Electronics Technology Corporation continues to promote standardization through its research institutes. Since the brittleness issue has been resolved, the transition to mass production now depends on improving TGV performance, the reliability of multilayer RDL, and cost curves during scaling. The strategic alliance between Intel and Lens Technology signals global endorsement of the supply chain developed in China, positioning the country for a leading role in the post-silicon substrate era.
Lightelligence announced the achievement of a commercialization milestone for optical computing by introducing the PACE 3 chip featuring a 256x256 photonic matrix. At the WAIC 2026 forum, the company demonstrated the world's first deployed photonic computation in real-world conditions using the Tianshu Light Cube access control system.
The PACE 3 chip is specifically designed for performing inference on large models, not for training them. It utilizes a photonic in-memory computing architecture to execute matrix-vector multiplications, which is the primary computational pattern during neural network inference. This architecture provides lower latency and better energy efficiency compared to electronic counterparts.
The hybrid photo-electric architecture addresses a fundamental problem: while photonic computing offers advantages such as high throughput, reduced transmission losses, and inherent parallel processing capability, its practical application requires integration with electronic systems for data conversion and control. The main obstacle to scaling was a contradiction: end-users saw no incentive to reconfigure software for unproven hardware, and suppliers lacked market demand to cover the costs of producing optical devices.
Lightelligence's method involves combining the capabilities of optical switching, optical interconnects, and the photonic computations themselves within its product line. This allows for the creation of integrated photo-electric solutions that do not require clients to completely overhaul their software stack. Co-founder and CTO, Dr. Meng Huaiyu, noted that the size of the photonic matrix was intentionally chosen to achieve an optimal balance, as large computations require effective coordination between matrices of different sizes, rather than one excessively large one.
Dr. Shen Yichen compared the current stage of development to creating a hardware lottery for future applications, drawing parallels with how NVIDIA's gaming processors spurred the development of neural networks. Lightelligence also places simulators in classrooms so that next-generation algorithms can evolve on photonic hardware. The company asserts that photonic computing is not a replacement for GPUs but forms an entirely new ecosystem, and the demonstration of the access control system confirms long-term operational stability.
