Suxian Micro has introduced its unified computing architecture, TUCA, and the Tianheng GPGPU chips, thereby entering the GPGPU segment for embodied intelligence. These releases took place at the company's headquarters in Tianjin.
Suxian Micro has introduced its unified computing architecture, TUCA, and the Tianheng GPGPU chips, thereby entering the GPGPU segment for embodied intelligence. These releases took place at the company's headquarters in Tianjin.
Suxian Micro launched the TH1100 GPGPU with a computational power of 100 TFLOPS, which incorporates on-chip compute and storage fusion technology and AI ROM technology, utilizing a development logic of 'rendering first, then AI'. The company was founded in 2015 in Hefei by Yan Tian and Wang Pan, graduates of the University of Science and Technology of China (USTC), and over a decade, it has established itself as a leader in IoT rendering GPUs.
Discovering the market for microcontrollers with GPUs, opened up by the transition of automotive instrument panels to smart cabin LCD displays, the company released the GC9003 in 2019 as the first domestic automotive MCU with 3D graphics. This was followed by the introduction of GC9002 and GC9005, which are used in smart cabins, home appliances, industrial control, and medical devices.
The 'rendering first, then AI' logic is similar to NVIDIA's approach: rendering is the first layer, and AI is the second. Because the rendering IP matured around 2021–2022, a natural expansion to GPGPU became possible. Instead of purchasing ready-made IP, the company uses forward design for deep optimization, aligning with the law of diminishing time. This approach is defined by three innovations: a forward-designed full-stack GPU IP; compute and storage fusion within the chip, which reduces data movement according to von Neumann; and AI ROM, which fixes model parameters directly in ROM, reducing storage and power consumption while improving token output.
The TUCA architecture features a multi-level design covering the entire computing chain: an application programming interface layer for developers, a compilation optimization layer, a scheduling layer responsible for memory management and multi-device coordination, and an accelerated library layer providing matrix operation, convolution, and Transformer operators. The TUCA Playground platform allows for online compilation and execution via a browser without needing to install toolchains. The first chip in the series, Tianheng TH1100, delivers 100 TFLOPS for physical AI and embodied intelligence scenarios. It integrates 6 SXGPU cores and an 8-core Cortex-A55 processor with an Image Signal Processor (ISP) and a security encryption mechanism. Peak performance reaches 98.2 TOPS in sparse FP4 mode and 12.3 TFLOPS in dense FP16 mode, with up to 128 GB of memory at a bandwidth of 85.3 GB/s, enabling full inference for LLMs with 35B-A3B parameters in approximately 50 milliseconds per token at INT4 accuracy.
The company plans to develop the TH1800 with an 800 TFLOPS benchmark, capable of competing with Jetson Thor for robotics and autonomous driving by the end of 2027, and the TH24K0 with a 4000 TFLOPS rating comparable to the RTX 4090 by 2028. The choice of Tianjin is strategic, as embodied intelligence was identified as a growth point in the municipal report for 2026, and both Tianjin University and Nankai University are located in Jinan. The company emphasizes comprehensive delivery—chip plus algorithm plus solution—given that most clients lack in-house AI teams, imported chips carry supply chain risks, and many suppliers offer only hardware without solutions for specific scenarios. Thus, TUCA and Tianheng position Suxian Micro at the intersection of edge computing, embodied intelligence, and domestic GPU supply chains as AI transitions from the digital to the physical world.
Lightelligence announced the achievement of a commercialization milestone for optical computing by introducing the PACE 3 chip featuring a 256x256 photonic matrix. At the WAIC 2026 forum, the company demonstrated the world's first deployed photonic computation in real-world conditions using the Tianshu Light Cube access control system.
The PACE 3 chip is specifically designed for performing inference on large models, not for training them. It utilizes a photonic in-memory computing architecture to execute matrix-vector multiplications, which is the primary computational pattern during neural network inference. This architecture provides lower latency and better energy efficiency compared to electronic counterparts.
The hybrid photo-electric architecture addresses a fundamental problem: while photonic computing offers advantages such as high throughput, reduced transmission losses, and inherent parallel processing capability, its practical application requires integration with electronic systems for data conversion and control. The main obstacle to scaling was a contradiction: end-users saw no incentive to reconfigure software for unproven hardware, and suppliers lacked market demand to cover the costs of producing optical devices.
Lightelligence's method involves combining the capabilities of optical switching, optical interconnects, and the photonic computations themselves within its product line. This allows for the creation of integrated photo-electric solutions that do not require clients to completely overhaul their software stack. Co-founder and CTO, Dr. Meng Huaiyu, noted that the size of the photonic matrix was intentionally chosen to achieve an optimal balance, as large computations require effective coordination between matrices of different sizes, rather than one excessively large one.
Dr. Shen Yichen compared the current stage of development to creating a hardware lottery for future applications, drawing parallels with how NVIDIA's gaming processors spurred the development of neural networks. Lightelligence also places simulators in classrooms so that next-generation algorithms can evolve on photonic hardware. The company asserts that photonic computing is not a replacement for GPUs but forms an entirely new ecosystem, and the demonstration of the access control system confirms long-term operational stability.
