CXMT ChangXin Memory Technologies conducted an IPO on the STAR Market, raising approximately 66.6 billion yuan. This makes it the largest A-share IPO in 2026. The company positions itself as the world's fourth DRAM manufacturer, holding a 7.67% market share, and aims to challenge the dominance of Korean manufacturers by 2030.
The IPO was priced at 8.66 yuan per share and attracted 9.43 million effective subscribers with a lottery ratio of about 0.47%, a record for the STAR Market. Institutional investors forecast a post-listing market capitalization in the range of 2–3 trillion yuan, which would place CXMT among the most valuable semiconductor companies globally.
According to Omdia, by the fourth quarter of 2025, CXMT achieved the status of the world's fourth DRAM producer with a 7.67% market share. The company's annual revenue in 2025 reached 29.1 billion yuan, and net profit in the first quarter of 2026 hit 24.8 billion yuan, demonstrating a 1688% year-over-year growth. The company forecasts that net profit in the first half of 2026 will reach 50–57 billion yuan, driven by the memory supercycle stimulated by artificial intelligence, which has created unprecedented demand for both traditional DRAM and new HBM products.
The IPO structure reflects the company's strategic position: Alibaba holds approximately 5% of CXMT shares through an investment of 7.6 billion yuan, which is estimated to have reached 130 billion yuan by the time of the IPO, making it one of the most successful corporate investments in Chinese technology. The funds raised from the IPO will be used exclusively for expanding DRAM production. It is expected that by the end of 2026, production capacity will reach approximately 350,000 wafers per month, approaching Micron's output level, according to Citrini Research.
Market dynamics favor CXMT's expansion. Samsung, SK Hynix, and Micron are actively shifting production capacities towards high-margin HBM for AI accelerators, thereby freeing up DDR5 and LPDDR5 segments. CXMT capitalized on this opened market window by launching mass production of LPDDR5, DDR5, and LPDDR5X products between 2023 and 2025. The company's latest LPDDR5X 10667 products have already passed sampling and meet the specifications of global leaders.
Nevertheless, serious obstacles remain. Due to export controls, the company lacks EUV lithography equipment, lagging behind international competitors by about two technological generations in process nodes, which increases the unit cost. HBM production remains unattainable due to unresolved yield issues. Ms. Hwang, Director of Counterpoint Research, believes that Chinese DRAM manufacturers will not catch up with Korean leaders in high-tech products before 2030. The company needs to manage intellectual property risks, achieve approximately a 15% global market share to generate sufficient EBITDA for self-financing capital expenditures, and develop breakthrough innovations instead of following established technological paths. Morgan Stanley recently downgraded ratings for Samsung and SK Hynix, citing CXMT's capacity expansion as a structural risk to Korean dominance in the memory market, confirming the growing influence of Chinese DRAM on the global memory landscape.
China has developed the first artificial intelligence chip that integrates programmable computing and three-dimensional near-memory computing technologies. This chip demonstrated a performance of 520 trillion floating-point operations per second (TFLOPS) using a 14nm process technology.
The achievement of high performance was realized through architectural innovations rather than by transitioning to cutting-edge manufacturing nodes. The software-defined architecture allows for dynamic reconfiguration of hardware resources for various computational tasks, significantly increasing the utilization rate of computing power compared to fixed-function accelerators.
Thanks to this flexibility, the same chip can efficiently handle a wide range of AI tasks, including image recognition, natural language processing, and scientific computing, while avoiding the efficiency losses inherent in general-purpose hardware. Furthermore, the near-memory 3D computing approach uses vertical stacking to tightly integrate compute blocks with memory, providing a memory bandwidth of 6.4 TB/s.
This method fundamentally eliminates the 'memory wall' problem, which has long limited processor performance. In traditional architectures, moving data between separate compute and memory chips creates a bottleneck in terms of both performance and power consumption. By stacking memory directly above the compute blocks, the physical distance the signal must travel is drastically reduced.
Along with the chip itself, a complete software suite compatible with major deep learning frameworks was released. The product portfolio includes accelerator cards, AI servers, liquid-cooled supernodes, and large-scale intelligent computing clusters, forming a complete ecosystem for deploying and training large models. The architecture is designed to scale from edge devices to data center-level clusters.
Industry analysts view this achievement as important proof that architectural innovations can partially compensate for lags in manufacturing technology. Moving away from dependence on the most advanced fabrication nodes makes the chip supply chain more stable and controllable, which is critically important amid ongoing export controls on semiconductor manufacturing equipment to China. This approach represents a fundamentally different philosophy compared to both the NVIDIA GPU approach and the process scaling race led by leading chip manufacturers.
Although the chip does not match the raw performance of the NVIDIA H100 or B200 on leading nodes, its demonstrated capability on 14nm indicates that architectural enhancements can substantially narrow the performance gap while ensuring supply chain resilience. This dual focus on architecture-driven performance and supply chain stability is becoming a defining characteristic of the strategy for developing domestic AI chips in China.
