A joint research group from Peking University and the Shanghai Institute of Microsystems, Chinese Academy of Sciences, has developed the world's first millisecond-level neuromorphic dynamic chip based on phase-change memristors. This development was published in the journal Science on July 14th.
This chip, measuring only 0.28 square millimeters, is capable of achieving a computation latency of 2.12 milliseconds. It integrates in-memory computing arrays for matrix operations and stepped shift arrays for adaptive integration.
The chip fundamentally changes the approach to computation in neural dynamics systems. The traditional Von Neumann architecture separates memory and processor, forcing data to constantly move between them, creating bottlenecks in latency and power consumption when solving differential equations required for neural dynamics. The Peking University team solved this problem differently by using the physical properties of the phase-change memory devices themselves to perform computations, instead of creating faster digital circuits.
Phase-change memristors possess continuously variable conductance, which can be precisely programmed and predictably evolve over time. Researchers mapped the search for adaptive integration required by neural dynamics solvers directly to the evolution of the conductance of these memristors. This means that the search, evaluation, and adjustment of step size—which digital circuits perform through many clock cycles—occurs via physical evolution within the device itself.
Furthermore, multi-level control of conductance allows for the creation of high-density in-memory computing arrays that simultaneously store neural network weights and perform matrix operations within a single array.
Experimental data demonstrates impressive performance. Compared to the most advanced ASIC accelerators, the system provides an acceleration ranging from 3.82 to 36.27 times while reducing power consumption by 3.9–7.8%. In tasks involving high-precision reconstruction of the brain cortex surface, the system outperforms the NVIDIA A100 GPU by 50.38–478.18 times. This marks the first instance where neural dynamics hardware has been brought to millisecond-level real-time operation, enabling applications previously limited to offline processing to become online real-time capabilities.
The article published in Science also contains a review paper describing this work as a paradigm shift in physically controlled computing. The significance of this development extends beyond demonstrated brain modeling and includes potential for real-time brain-computer interfaces, digital brain twins, neural navigation for surgery, and intelligent diagnosis of neurodegenerative diseases. The chip, operating at a frequency of 50 MHz with 9-stage pipelining, shows that architectural innovations can provide orders of magnitude improvement compared to a 'brute force' approach using GPUs for specialized computational tasks.
The research was supported by the New Cornerstone Investigator program, the National R&D Program, and the National Natural Science Foundation, as well as the Guangdong Key Laboratory of In-Memory Computing Chips. This chip represents a distinctly Chinese contribution to the developing field of physically controlled in-memory computing, where performance enhancement is driven by device physics rather than Moore's Law scaling.
